8 QAM

8-QUADRATURE AMPLITUDE MODULATION(8-QAM):

  • The amplitude gets changed in 8-QAM , and it is not a constant value.
  • 3 bits encoded forming tribits and producing 8 different output phase.
  • N = 3, M = 2N = 23 = 8
  • Therefore 8 output phases will be produced.

8-QAM transmitter:

8 QAM

  • The difference between 8-QAM and 8-PSK transmitter is the emission of invertor between C channel and Q product modulator.
  • Input given to bit splitter where it is converted to parallel 3 channel output.
  • It is inphase, quadrature control.
  • The bit rate of 3 channel is fb/3.
  • I channel bit enters 2 to 4 level convertor.
  • Q channel enters 2 to 4 level convertor. Where it converts parallel input digital to analog convertors(DAC).
  • With 2 input bits 4 output combinations are possible.

Algorithm:

  • I,Q – polarity

            Logic 1 – +1V

            Logic 0 – -1V

  • C – magnitude

            Logic 1 – 1.307V

            Logic 0 – 0.541V

    I    C
00-0.541V
01-1.307 V
10+0.541V
11+1.307V
    Q    C
00-0.541V
01-1.307 V
10+0.541V
11+1.307V

Adjucent phase change by 1 bit and is called grade code (or) maximum distance code.

Bandwidth consideration:

Input data rate =fb.

Data rate in I,Q channel = fb /3.

Therefore fundamental frequency,

                                                fa = (fb /3) / 2

fa = fb /6

The output of BM = (X sin wat) (sin wct)

wa = 2∏fbt/6
wc = 2∏fc

                              = {X sin 2∏fbt/6 } {sin wc = 2∏fc }

                              = X/2 {cos 2∏ (fc  – fb/6 )t} -{cos 2∏ (fc  + fb/6 )t}

Therefore bandwidth,

                        BW= (fc + fb/6 ) – (fc  – fb/6 )

                               =2fb/6

BW = fb/3
  Q     I       C
000-112.5
001-157.5
010-67.5
011-22.5
100112.5
101157.5
11067.5
11122.5

8-QAM receiver:

  • The power splitter directs to the input 8-QAM signal to I,Q channel product detectors and carrier recovery circuit.
  • The incoming 8-QAM signal is mixed with the recovered carrier in the I product detector and quadrature carrier in Q product detector.
  • The output of product detector(4 level PAM) is given to 4 to 2 level ADC’s.
  • The output of ADC’s are I,C bits and Q,C’ bits .
  • The parallel to serial logic circuit gives Q,C data stream bit.
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